Plasma display
US7339553B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2002 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | Jul 28, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0204
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A plasma display panel with a drive circuit that divides a field into a plurality of sub-fields with each sub-field including a write period, a discharge sustain period and an erase period. In the discharge sustain period at least one of a plurality of pulses applied in a later part of the discharge sustain period has a larger pulse width than a pulse applied in an earlier part of the discharge sustain period and in the erase period, a narrow pulse is applied to a pair of electrodes extending across each of a plurality of discharge cells. The narrow pulse has a pulse height lower than a discharge firing voltage of the plurality of discharge cells and a smaller pulse width than the pulses applied in the discharge sustain period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.