Stacked memory module in mirror image arrangement and method for the same
US7339794B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2006 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | Oct 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1572
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A stacked memory module is manufactured in mirror image arrangement and a method for the same. The pins of a first memory unit and pins of a second memory unit are electrically connected to an upper face and a lower face of a first printed circuit board made of rigid material. The pins of the second memory unit are in mirror image arrangement with respect to the pins of the first memory unit. Two second PCBs are made of flexible material and electrically connected to both sides of the first PCB. Conductive contacts such as gold fingers are electrically connected to circuit on the second PCB. The manufacture cost is reduced and manufacture process is simplified. The signal quality is enhanced because the signal paths are uniform and the load impedance is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.