Circuit configuration and method for identifying error situations in interconnected systems
US7340437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2003 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | Sep 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2829
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The circuit configuration according to the invention comprises an electrical signal line loop, several partial systems connected thereto, which evaluate the state of the signal line loop, wherein a first selectable switching means is looped in between a first end of the signal line loop and a first voltage connection and a second selectable switching means is looped in between a second end of the signal line loop and a second voltage connection, and a selection unit for selecting the first and second switching means. Use, e.g. in a fuel cell system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.