Superior misaligned memory load and copy using merge hardware
US7340495B2 · kind B2 · utility
11Cited by
20References
52Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2003 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | May 8, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/15
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method, apparatus, and program means for performing misaligned memory load and copy using aligned memory operations together with a SIMD merge instruction. The method of one embodiment comprises determining whether a memory operation involves a misaligned memory address. The memory operation is performed with aligned memory accesses if the memory operation is determined as not involving a misaligned memory address. The memory operation is performed with an algorithm including a merge operation and aligned memory accesses if the memory operation is determined as involving a misaligned memory address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.