System and method for initializing a memory device from block oriented NAND flash
US7340566B2 · kind B2 · utility
106Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2003 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | May 4, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is a system and method for initializing other memory from block oriented NAND flash by central processing units (CPUs) designed for non-NAND flash. The system employs a sequential loader that avoids the use of branches, loops, and the like, to enable a portion of the sequential loader to be sequentially fetched and executed by the CPU. The fetched and executed portion of the sequential loader is configured to copy additional instructions from NAND flash into random-access memory, such that the CPU may be fully booted from the sequential loader by executing code that has been copied into the random-access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.