GBit/s transceiver with built-in self test features
US7340662B1 · kind B1 · utility
Inventors
Key dates
| Filing date | Apr 30, 2003 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | Mar 31, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3167
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
GBit/s transceiver with built-in self test features. A method is disclosed for testing the operation of a transceiver having a digital processing section and an analog section, each having a transmit portion and a receive portion, the analog portions adaptable to interface with an analog network. The transceiver is first configured to operate in a test mode. In the test mode, the transmit portion of the digital processing section is activated to generate data to be transmitted by the transmit portion of the analog section. The receive portion of the analog section and the receive portion of the digital processing section are operated to receive data. Thereafter, the parametrics of select portions of the receive portion of the digital processing section are examined during the receipt of data by the receive portion of the analog section and processing thereof by the receive portion of the digital processing section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.