Slew rate enhancement circuitry for folded cascode amplifier
US7342450B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 11, 2006 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Apr 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45248
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A folded-cascode operational amplifier including a differential input stage (19) and a class AB output stage (20) includes a first slew boost current mirror (13) and a second slew boost current mirror (14) having inputs connected to drains of the input transistors, respectively. Each current mirror amplifies excess tail current steered into it as a result of a large, rapid input signal transition. The amplified excess tail current is used to boost the slew rate of the class AB output stage in accordance with a first polarity of the difference between the first (Vin+) and second (Vin−) input voltages. The drains of the input transistors are maintained at a voltage less than a transistor threshold voltage above the ground except during slewing operation of the operational amplifier to effectively isolate the current mirrors except during slewing operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.