Ball grid array resistor capacitor network
US7342804B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2004 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Jul 21, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P1/268
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An R-C network formed on a substrate. The capacitor includes a metal member with anodized and unanodized layers. The unanodized layer functions as one of the capacitor's electrodes. The anodized layer functions as the capacitor's dielectric layer. The resistor is formed from material on the same side of the substrate as the capacitor. In some versions of the invention, the resistor is formed on top of a substrate dielectric layer. In these versions of the invention, a conductor both functions as one of the capacitor's electrodes and connects the resistor to the capacitor. In alternative versions of the invention, the resistor is formed from a film that disposed on the undersurface a metal foil. The foil functions as the resistor to capacitor conductor. Sections of the foil that are removed expose and define the resistor. Solder balls or other connectors on the substrate surface connect the network to another component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.