Patent · US Expired

Input circuit and method for the operation thereof

US7343507B2 · kind B2 · utility

0Cited by

6References

17Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Stefan Grosser · Schnaittenbach, DE
Mario Maier · Ensdorf, DE
Reinhard Mark · Hersbruck, DE
Monika Singer · Greenville, US

Key dates

Filing date	Jul 7, 2004
Grant date	Mar 11, 2008
Priority date	—
Expiry date	Mar 28, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH03K2005/00247
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An input circuit (1′) provided with a time delay element (40), which circuit is capable of being tested by a controlled high level or low level connection, and a method for the operation thereof. The delay time of the time-delay element can be modified during operation of the input circuit. In particular, the elapsed delay time is read out prior to the testing of the input circuit and is restored again after testing, so that the test does not increase the effective input delay time for the process signals. In addition or as an alternative, the delay time is set to a minimum value prior to the test to enable rapid testing of the input circuit independent of the set delay time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.