Method for forming via hole and trench for dual damascene interconnection
US7344992B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2004 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Oct 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76808
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a via hole and a trench for a dual damascene interconnection comprises forming a via hole through an inter-metal insulating film to expose a portion of a surface of an etch stop film on a lower metal film, forming a photoresist film on an entire surface of the resultant structure and in the via hole, exposing a top surface and a side surface of the inter-metal insulating film by recessing the photoresist film using a development process for the photoresist film, forming a bottom antireflective coating film on the exposed surfaces of the inter-metal insulating film and the photoresist film, forming a mask pattern on the bottom antireflective coating film, forming a trench by an etching process using the mask pattern as an etch mask, and completely removing the photoresist film within the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.