Field effect transistor having contact plugs in the source region greater than in the drain region
US7345346B2 · kind B2 · utility
7Cited by
0References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2006 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Nov 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A semiconductor device having a field effect transistor formed on a semiconductor layer on an insulator, comprising: a drain electrode wiring formed over a drain region of the field effect transistor; a source electrode wiring formed over a source region of the field effect transistor; first contact plugs connecting the drain region and the drain electrode wiring; and second contact plugs which connect the source region and the source electrode wiring, and the number of which is greater than the first contact plugs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.