Semiconductor device having semiconductor chip on base through solder layer and method for manufacturing the same
US7345369B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 13, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Oct 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a base member; a solder layer; and a semiconductor chip disposed on the base member through the solder layer. The chip has an in-plane temperature distribution when the chip is operated. The chip has an allowable maximum temperature as a temperature limit of operation. The in-plane temperature distribution of the chip provides a temperature of the chip at each position of a surface of the chip. The temperature margin at each position is obtained by subtracting the temperature of the chip from the allowable maximum temperature. The solder layer has an allowable maximum diameter of a void at each position, the void being disposed in the solder layer. The allowable maximum diameter of the void at each position becomes larger as the temperature margin at the position becomes larger.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.