Method and measurement program for burn-in test of two semiconductor devices simultaneously
US7345498B2 · kind B2 · utility
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5References
10Claims
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Key dates
| Filing date | Sep 28, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Oct 22, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2863
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for a burn-in test includes steps (a) and (b). In the step (a), an operation test of a first semiconductor device is executed through first probes provided on a probe card. In the step (b), a stress is applied to a second semiconductor device through second probes provided on the probe card while the operation test is executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.