Use of flash memory blocks outside of the main flash memory array
US7345914B2 · kind B2 · utility
2Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Apr 3, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, device, and system are disclosed. In one embodiment, the device comprises an array of flash memory blocks to store information in a multiple bit per cell mode, one or more flash memory blocks external to the array to store information in a single bit per cell mode, and a memory controller capable of allowing access to the array and the one or more flash memory blocks external to the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.