High efficiency data buffering in a computer network device
US7346067B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2001 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Apr 25, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3045
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network processing device stores and aligns data received from an input port prior to forwarding the data to an output port. Data packets arrive at various input ports already having an output queue or virtual output queue assigned. A buffer manager groups one or more packets destined for the same output queue into blocks, and stores the blocks in a buffer memory. A linked list is created of the trunks, which is an ordered collection of blocks. The trunks are sent to a high speed second memory and stored together as a unit. In some embodiments the trunks are split on boundaries and stored in a high speed memory. Once the trunks are stored in the high speed second memory, the corresponding data is erased from the write combine buffer memory and the pointers that made up the linked list are returned to a free block pointer pool. The data can then be read from the high speed second memory very quickly, passed through a switching fabric, and placed back on the computer network for its next destination. In other embodiments, the trunk data is stored after passing through the switching fabric, before being placed back on the computer network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.