Physical layer circuit and interface circuit
US7346073B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2003 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Feb 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/64
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.