System and method for modeling, abstraction, and analysis of software
US7346486B2 · kind B2 · utility
261Cited by
6References
2Claims
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Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Apr 11, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3608
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method is disclosed for formal verification of software programs that advantageously translates the software, which can have bounded recursion, into a Boolean representation comprised of basic blocks and which applies SAT-based model checking to the Boolean representation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.