Logic design development tool and method
US7346864B2 · kind B2 · utility
9Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Jul 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic design development tool including a converting unit configured to convert a plurality of different circuit design languages into a common intermediate format, and an executing unit configured to execute the common intermediate format so as to perform a design simulation of a circuit defined by the circuit design languages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.