ASIC having dense mask-programmable portion and related system development method
US7346876B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2004 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Aug 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/21
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method is disclosed whereby an inexpensive integrated circuit is provided for use in high volume electronic consumer devices of different makes, wherein each different make must perform a different special function. A common function required in all the different makes is realized in a substantially non-customizable portion. A dense mask-programmable portion is provided for realizing a special function. Interface circuitry is provided that enables an external FPGA to perform the special function at system operating speeds during system development. After system development, the circuitry implemented in the external FPGA is technology-mapped to the mask-programmable portion. A single mask is fashioned such that versions of the integrated circuit are produced with their mask-programmable portions customized to perform the special function. I/O terminals that were used to couple to the external FPGA during system development are usable during normal operation to provide system board access to circuitry within the mask-programmable portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.