Process for manufacturing a semiconductor device, a semiconductor device and a high-frequency circuit
US7348221B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 5, 2005 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Nov 25, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing a semiconductor device, provides that a silicide layer is formed, an amorphous semiconductor layer is applied both to the silicide layer and to an open monocrystalline semiconductor region, adjacent to the silicide layer, and during a subsequent temperature treatment, the amorphous semiconductor layer is crystallized proceeding from the open, monocrystalline semiconductor region, acting as a crystallization nucleus, so that the silicide layer is covered at least partially by a crystallized, monocrystalline semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.