Chip-to-chip digital transmission circuit delivering power over signal lines
US7348805B2 · kind B2 · utility
2Cited by
12References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2006 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | May 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A chip-to-chip digital transmission circuit includes a differential driver portion, a pair of differential signal transmission lines connected to the driver portion, and a receiver portion connected to the transmission lines, an output node of which reproduces a digital bit stream originally presented to a driver side input node, wherein the transmission lines carry both transmitted signal information and DC power for the receiver portion. The driver portion is configured to adjust both the transmitted signal magnitude and the DC power delivered to the receiver portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.