Integrated implementation of a collector boost scheme and method therefor
US7348847B2 · kind B2 · utility
64Cited by
8References
46Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 28, 2005 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Jul 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/345
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and a second voltage in a second mode of operation to the power amplifier. The collector boost circuit uses a switch and an indicator signal for triggering the switch between the first and the second mode of operation. The second voltage is a boosted voltage greater than the first voltage and is provided during peak excursions through a boost capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.