Method and systems to align outputs signals of an analog-to-digital converter
US7348914B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2006 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Jun 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed herein to provide improved alignment of output signals of an analog-to-digital converter (ADC). For example, in accordance with an embodiment of the present invention, a method of aligning digital signals appearing on signal paths of a parallel data bus includes sampling the digital signals at a plurality of delay times to obtain a plurality of sample sets, wherein each sample set is associated with a corresponding delay time. A second digital signal that is misaligned with respect to a first digital signal is identified from the sample sets. The delay time required to align the second digital signal with the first digital signal is determined. The delay of the second digital signal is adjusted by the determined delay time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.