Extending PPM tolerance using a tracking data recovery algorithm in a data recovery circuit
US7349507B2 · kind B2 · utility
3Cited by
10References
37Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 9, 2003 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Jul 31, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit comprising a sampling logic to sample an incoming signal. A phase detection logic to determine a phase error associated with the sample of the incoming signal and to output an out-of-phase detection signal based on the phase error. A control logic coupled to the phase detection logic to output a periodic error signal at a periodic rate. A phase adjustment logic to adjust the phase of the sampling logic based on the out-of-phase detection signal and the periodic error signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.