Digital circuit to measure and/or correct duty cycles
US7350095B2 · kind B2 · utility
4Cited by
12References
1Claims
0Family size
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Key dates
| Filing date | Mar 17, 2005 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Jul 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method, an apparatus, and a computer program are provided to measure and/or correct duty cycles. Duty cycles of various signals, specifically clocking signals, are important. However, measurement of very high frequency signals, off-chip, and in a laboratory environment can be very difficult and present numerous problems. To combat problems associated with making off-chip measurements and adjustments of signal duty cycles, comparisons are made between input signals and divided input signals that allow for easy measurement and adjustment of on-chip signals, including clocking signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.