Optimization and design method for configurable analog circuits and devices
US7350164B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 1, 2004 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Feb 21, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Optimization design method for configurable analog circuits and devices resulting from same. An implementation fabric for a given application domain can be accurately pre-characterized in terms of devices and parasitics. Customization structures are designed and characterized to be applied to the fabric to customize a device for a particular application. In some embodiments, characterization is accomplished by formulating a configurable design problem as an optimization with recourse problem, for example, a geometric programming with recourse (GPR) problem. Devices can be produced for multiple applications from the application domain using the same optimized fabric to provide predictable performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.