Methods and apparatus for variable latency support
US7353484B1 · kind B1 · utility
3Cited by
3References
27Claims
0Family size
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Key dates
| Filing date | Feb 9, 2004 |
| Grant date | Apr 1, 2008 |
| Priority date | — |
| Expiry date | Apr 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for interconnecting primary components with secondary components on a programmable chip. Control, data, and address lines are automatically generated to connect primary components and secondary components with an interconnection module. The interconnection connection module manages interaction between primary components and secondary components and provides support for fixed latency and variable latency secondary components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.