Level shifter circuit
US7355447B2 · kind B2 · utility
6Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2006 |
| Grant date | Apr 8, 2008 |
| Priority date | — |
| Expiry date | Jul 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level shifter is disclosed. The level shifter includes a level shifter core circuit and a pull-up control logic circuit. In response to an input signal and an output signal of the level shifter core circuit, the pull-up control logic circuit selectively turns on a transistor within the level shifter core circuit to prevent the occurrence of a strong P-N fight state within the level shifter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.