Method of specifying pin states for a memory chip
US7356434B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2005 |
| Grant date | Apr 8, 2008 |
| Priority date | — |
| Expiry date | Oct 14, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention discloses a method of specifying pin states for a memory chip having one or more pins. In one embodiment of the invention, the pins are prioritized to obtain a pin order, wherein the pin state of a pin of a higher order dominates the pin state of a pin of a lower order. A number of possible combinations of the pin states are generated for the pins based on the pin order. The possible combinations are presented using a data presentation format. At least one pin of a higher order dominates at least one pin of a lower order when the at least one pin of a higher order is set in a predetermined pin state, such that the number of the possible combinations presented is reduced by neglecting combinations generated by the pins states of the dominated pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.