XOR-based conditional keeper and an architecture implementing its application to match lines
US7358768B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2006 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Jul 24, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses an XOR-based conditional keeper and an architecture implementing its application to match lines, wherein the XOR gate in the conditional keeper receives a clock signal synchronous with CAM (Content Addressable Memory) cells and cooperates with a floating signal from the floating node to create an XOR control signal, and the XOR control signal is transmitted to a P-type transistor to create a data signal to control the XOR-based conditional keeper so that the XOR-based conditional keeper can execute an appropriate corresponding action, which can replace the conventional keepers of merely “on” and “off” modes. Further, the XOR-based conditional keeper of the present invention can apply to the dynamic CAM match line architecture so that the dynamic match line can have lower power consumption, higher noise immunity, and high processing speed. Further, the XOR-based conditional keeper of the present invention can also apply to all kinds of dynamic circuits, particularly to a high fan-in circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.