Linearized bias circuit with adaptation
US7358817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2006 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Jul 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/391
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A linearized bias circuit with adaptation resolves the problem happening to the power amplifier with conventional bias circuit that the DC and AC characteristics of the power amplifier shift or even deteriorate due to a temperature variation. The linearized bias circuit with adaptation has a reference voltage source, a first voltage source, a first resistor, a second resistor, a first NPN transistor, a second NPN transistor, and a third NPN transistor. The present invention has the characteristics of bias current temperature compensation, gain and phase compensations to achieve high linearity for the conventional power amplifier and reducing the DC consumption power. At the same time, the quantity of the required elements and layout area in the present invention are small so that the design complexity can be reduced for improving yield, reducing IC layout area, and reducing cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.