Mixing DAC architectures for a radio frequency receiver
US7358885B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2006 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Nov 30, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A receiver (300) includes a mixing digital-to-analog converter (DAC) (118A), a direct digital frequency synthesizer (DDFS) (132) and a dynamic element matching (DEM) circuit (304). A DAC of the mixing DAC (118A) is implemented as a segmented DAC having a thermometer encoded DAC section (120A) and a binary encoded DAC section (120B). The DDFS (132) includes outputs configured to provide bits associated with a digital LO signal to inputs of a switching section (124A, 124B) of the mixing DAC (118A). The DEM circuit (304) is coupled between the outputs of the DDFS (132) and the inputs of the switching section (124A) that are associated with the thermometer encoded DAC section (120A). The DEM circuit (304) is configured to scramble the bits provided to the thermometer encoded DAC section (120A).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.