Multi-threaded packet processing engine for stateful packet processing
US7360217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2002 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Jan 23, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing engine to accomplish a multiplicity of tasks has a multiplicity of processing tribes, each tribe comprising a multiplicity of context register sets and a multiplicity of processing resources for concurrent processing of a multiplicity of threads to accomplish the tasks, a memory structure having a multiplicity of memory blocks, each block storing data for processing threads, and an interconnect structure and control system enabling tribe-to-tribe migration of contexts to move threads from tribe-to-tribe. The processing engine is characterized in that individual ones of the tribes have preferential access to individual ones of the multiplicity of memory blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.