Low swing current mode logic family
US7362140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2005 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | May 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a low swing current mode logic circuit including: a current mode logic block having data inputs and outputs; a pre-charging circuit for pre-charging the outputs; a dynamic current source; an evaluation circuit for evaluating the logic block during an evaluation phase; and, a feedback path arranged between the outputs and the dynamic current source which is responsive to a difference between the outputs. The simplicity of generating the low swing, achieved by the feedback which may be implemented by only two transistors, is in contrast with the complexity introduced by some methods used by other logic styles for achieving low swing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.