Integrated circuit with on-chip clock frequency matching to upstream head end equipment
US7362767B2 · kind B2 · utility
7Cited by
2References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2003 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Jan 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0664
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
One aspect of the present invention concerns a method for controlling the frequency of oscillation of a local clock signal comprising the steps of (A) generating the clock signal in response to a first control signal, (B) generating the first control signal in response to one of a plurality of adjustment signals selected in response to a second control signal and (C) generating the second control signal in response to a comparison between a local timestamp and an external timestamp.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.