Clock generator circuit and related method for generating output clock signal
US7362835B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 4, 2005 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Aug 12, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a clock generator circuit for generating an output clock signal. The clock generator circuit includes: a random frequency code generator for generating a frequency code randomly, wherein the random frequency code generator is clocked by a first clock signal; an accumulator electrically connected to the random frequency code generator, for generating a selection code by accumulating the frequency code, wherein the accumulator is clocked by the first clock signal; a first multiplexer electrically connected to the accumulator, for selecting one of a plurality of reference clock signals as the first clock signal according to the selection code; and a toggle circuit electrically connected to the first multiplexer, being clocked by the first clock signal for generating the output clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.