Phase lock loop applying in wireless communication system and method thereof
US7363013B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2003 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Oct 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03C3/0966
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase lock loop receives a baseband signal which has an input frequency, and modulating the baseband signal to be a corresponding RF signal which has a predetermined transmission frequency for transmitting. The phase lock loop comprises a programmable divider, a modulator, a phase detector, a charging pump, a loop filter, a voltage-controlled oscillator and a frequency converter. The programmable divider divides the frequency of a local oscillating signal by a programmable divisor to generate a reference signal. The modulator receives the baseband signal, modulates the frequency of the reference signal according to the baseband signal, and generates a corresponding first comparison signal. The frequency converter receives the feedback RF signal and the local oscillating signal and outputs the second comparison signal according to the frequency difference. The divisor of the divider is programmable to avoid the spur frequency being generated because the local oscillating signal is interfered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.