System and method for testing differential signal crossover using undersampling
US7363568B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 3, 2004 |
| Grant date | Apr 22, 2008 |
| Priority date | — |
| Expiry date | Oct 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
System and method for testing differential signal crossover in high-speed electronic equipment. A preferred embodiment comprises a test circuit coupled to a device under test (DUT) and an automatic test equipment (ATE). The test circuit comprises a pair of window comparators coupled to a differential mode signal from the DUT, each window comparator configured to compare one of two signals making up the differential mode signal with a voltage boundary when enabled by an enable signal. The ATE is configured to provide clock signals to the test circuit and the DUT and to process data produced by the test circuit to determine if the differential signal crossover meets timing constraints. The test circuit uses undersampling to enable testing of high frequency signals without requiring an extremely high sampling rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.