Process for preparing a bonding type semiconductor substrate
US7364982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2007 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Jan 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/819
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The process comprises a step of growing epitaxially mixed crystals of a compound semiconductor represented by the composition formula Inx(Ga1-yAly)1-xP on a GaAs substrate 12 to form an epi-wafer having an n-type cladding layer 14 (0.45<x<0.50, 0≦y≦1), an active layer 15, a p-type cladding layer 16 and a cover layer 17; a step of removing the cover layer 17 by etching to expose the surface of the p-type cladding layer 16; a step of integrally joining a mirror-finished GaP substrate 11 on the p-type cladding layer 16 by placing the GaP substrate on the cladding layer at room temperature so that the mirror-finished surface of the GaP substrate may come into contact with the p-type cladding layer 16; a step of subjecting the resultant laminate to a heat treatment; a step of carrying out an etching treatment from the side of the GaAs substrate 12 to expose the n-type cladding layer 14; and a step of forming electrodes 19 on the surface of the n-type cladding layer 14 and on the back surface of the GaP substrate 11, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.