Low impedance test fixture for impedance measurements
US7365550B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2005 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Jan 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/111
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test fixture couples with a test instrument to measure impedance of a device. An upper layer of the test fixture has (a) a first and a second solder pad for electrical connection to the device, (b) a first, second, third and fourth multi-solder pad for electrical connection to four connectors, (c) a first conductor track for connecting the first solder pad to a signal solder pad of the first multi-solder pad, (d) a second conductor track for connecting the first solder pad to a signal solder pad of the second multi-solder pad, (e) a third conductor track for connecting the second solder pad to a signal solder pad of the third multi-solder pad, and (f) a fourth conductor track for connecting the second solder pad to a signal solder pad of the fourth multi-solder pad. Each multi-solder pad has at least one return path solder pad. A lower layer of the test fixture has conductor tracks connected to the return path solder pad of each multi-solder pad. A dielectric substrate of the test fixture has substantially uniform thickness separating the upper layer from the bottom layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.