Low-delay signal processing based on highly oversampled digital processing
US7365669B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2007 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Mar 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R25/453
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low-delay signal processing system and method are provided which includes a delta-sigma analog-to-digital converter, an oversampling processor, and a delta-sigma digital-to-analog converter. The delta-sigma analog-to-digital converter receives an input or audio signal and generates a digital sample signal at a high oversampling rate. The oversampling processor is connected to the analog-to-digital converter for processing the digital sample signal at the high oversampling rate with low-delay. The delta-sigma digital-to-analog converter is connected to the oversampling processor for receiving the digital sample signal at the high oversampling rate with low-delay for generating an analog signal. The oversampling processor includes a low-delay filter and a programmable delay element. In this manner, the analog signal is produced with a low delay and high accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.