Sub-block domain transformation multiple signal processing
US7366231B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2004 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Sep 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2203/5495
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Embodiments of an Ethernet transceiver are disclosed. The Ethernet transceiver includes a plurality of digital signal streams, at least one digital signal stream being coupled to another of the digital signal streams. A domain transformer transforms sub-blocks of each of the plurality of the digital signal streams from an original domain into a lower complexity domain. A processor joint processes the transformed sub-blocks of the digital signal streams, each joint processed digital signal stream sub-block is influenced by other digital signal streams sub-blocks. An inverse transformer inverse transforms the joint processed signal streams sub-blocks back to the original domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.