Chip blanking and processing in SCDMA to mitigate impulse and burst noise and/or distortion
US7366258B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2004 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Nov 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/709709
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for mitigating impairment in a communication system includes a delay block, a signal level block, a moving average window block, an impulse noise detection block, and a combiner. The delay block receives and delays each chip of a plurality of chips in a spreading interval. The signal level block determines a signal level of each chip of the plurality of chips in the spreading interval. The moving average window block determines a composite signal level for a chip window corresponding to the chip. The impulse noise detection block receives the signal level, receives the composite signal level, and produces an erasure indication for each chip of the plurality of chips of the corresponding chip window. The combiner erases chips of the plurality of chips of the spreading interval based upon the erasure indication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.