Systems and methods for scheduling memory requests utilizing multi-level arbitration
US7366854B2 · kind B2 · utility
8Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 2003 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Jan 27, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1626
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a memory scheduler is provided to process memory requests. The memory scheduler may comprise: a plurality of arbitrators that each select memory requests according to age of the memory requests and whether resources are available for the memory requests; and a second-level arbitrator that selects, for an arbitration round, a series of memory requests made available by the plurality of arbitrators, wherein the second-level arbitrator begins the arbitration round by selecting a memory request from a least recently used (LRU) arbitrator of the plurality of arbitrators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.