Patent · US Expired

Method and apparatus for self-adjusting input delay in DDR-based memory systems

US7366862B2 · kind B2 · utility

37Cited by

4References

18Claims

0Family size

Assignee

LSI Logic Corporation · US

Inventors

John M. Nystuen · Burnsville, US
Steven Emerson · Chanhassen, US
Stefan Auracher · Baierbrunn, DE

Key dates

Filing date	Nov 12, 2004
Grant date	Apr 29, 2008
Priority date	—
Expiry date	Apr 26, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/4234
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and apparatus are provided for interfacing with a synchronous dynamic memory in which memory commands are provided to the memory. The memory is accessed in response to the memory commands. Read data is captured in a data capture circuit having a delay setting. The delay setting is updated in response to detection of a period of read inactivity of the memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.