Memory control device and image forming device equipped with a selection circuit selectively applying a reference clock or a modulated clock to a synchronous memory as an external clock based on a selection signal
US7366936B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 2, 2004 |
| Grant date | Apr 29, 2008 |
| Priority date | — |
| Expiry date | Oct 28, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1689
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Modulated clocks S-clk from a spread spectrum clock generator are supplied as operating clocks to an SDRAM when no control signals (ras#, cas#, cs# and we#) are output and no data is written to the SDRAM, that is before time t1, between time t3 and t4, and period after time t9. Reference clocks clk (fixed frequency clock) are supplied to the SDRAM as the operating clock when control signals are output and data is written to the SDRAM, that is during period between time t1 and t3 and between time t4 to t9. This makes it possible to reduce electromagnetic interference generated by clock signals supplied to the SDRAM while also enabling accurate control of the SDRAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.