Impedance calibration for source series terminated serial link transmitter
US7368902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Jul 15, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49174
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Substantially-accurate calibration of output impedance of a device-under-test (DUT) to within a predetermined range of allowable impedance. The DUT is part of a source series terminated (SST) serial link transmitter, in which two branches of parallel transistors each provide an impedance value when particular transistors of the parallel branch are turned on. The impedance value is added to a series-connected resistor to provide the output impedance. The DUT consists of one branch of parallel transistors in series with a resistor. Output impedance of the DUT is compared to the resistance of a reference resistor, and the comparator provides a control signal based on whether the output impedance falls within the pre-set percentage variance of the reference resistance. The control signal is processed by a FSM (finite state machine) that individually turns on or off the transistors within the parallel branch until the DUT impedance value falls within the desired range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.