Efficient and flexible sequencing of data processing units extending VLIW architecture
US7370136B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 26, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Oct 6, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A very long instruction word processor with sequence control. During each cycle the processor generates control signals to functional units based on the values in fields of an instruction. Each instruction may include an iteration count specifying the number of cycles for which the control signals should be generated based on that instruction. The instruction set further includes flow control instructions allowing for repetitive execution of a single instruction, repetitive execution of a block of instructions or branching within a program. Such a processor is illustrated in connection with a disk controller for a hard drive of a computer. The flexible sequencing allows a hard-drive controller to be readily reprogrammed for use in connection with different types of media or to be dynamically reprogrammed upon detection of a disk read error to increase the ability of the disk controller to recover data from a disk.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.