Memory controller with prefetching capability
US7370152B2 · kind B2 · utility
6Cited by
1References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2004 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Jul 11, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller monitors requests from one or more computer subsystems and issues one or more prefetch commands if the memory controller detects that the memory system is idle after a period of activity, or if a prefetch buffer read hit occurs. In some embodiments, results of a prefetching operations are stored in a prefetch buffer configured to provide an automatic aging mechanism, which evicts prefetched data from time to time. The prefetched data in the prefetch buffer is released and sent back to the requester in order with respect to previous memory access requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.