Method, system, and program for addressing pages of memory by an I/O device
US7370174B2 · kind B2 · utility
16Cited by
19References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Jan 2, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1009
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a method, system, and program for translating virtual addresses of memory locations within pages of different sizes. In one embodiment, a translation entry containing a physical address is stored in a data structure table for each page. Each virtual address includes a page virtual address which identifies the translation entry containing the physical address of the page containing the memory location. The virtual address may be translated to a translation entry index using the size of the page containing the memory location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.